vee
66 lines
1.9 KiB
C
66 lines
1.9 KiB
C
/***************************************************************************//**
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* \file main_cm0plus.c
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*
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* \brief
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* Main file for CM0+
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*
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********************************************************************************
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* \copyright
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* Copyright 2016-2019, Cypress Semiconductor Corporation. All rights reserved.
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* You may use this file only in accordance with the license, terms, conditions,
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* disclaimers, and limitations in the end user license agreement accompanying
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* the software package with which this file was provided.
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*******************************************************************************/
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#include "cy_project.h"
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#include "cy_device_headers.h"
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#if (CY_USE_PSVP == 1)
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#define USER_LED_PORT CY_AB_LED_PORT
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#define USER_LED_PIN CY_AB_LED_PIN
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#define USER_LED_PIN_MUX CY_AB_LED_PIN_MUX
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#else
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#define USER_LED_PORT CY_CB_USER_LED1_PORT
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#define USER_LED_PIN CY_CB_USER_LED1_PIN
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#define USER_LED_PIN_MUX CY_CB_USER_LED1_PIN_MUX
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#endif
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cy_stc_gpio_pin_config_t user_led_port_pin_cfg =
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{
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.outVal = 0ul,
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.driveMode = CY_GPIO_DM_STRONG_IN_OFF,
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.hsiom = USER_LED_PIN_MUX,
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.intEdge = 0ul,
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.intMask = 0ul,
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.vtrip = 0ul,
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.slewRate = 0ul,
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.driveSel = 0ul,
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};
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int main(void)
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{
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__enable_irq();
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SystemInit();
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/* Enable CM7_0/1. CY_CORTEX_M7_APPL_ADDR is calculated in linker script, check it in case of problems. */
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Cy_SysEnableApplCore(CORE_CM7_0, CY_CORTEX_M7_0_APPL_ADDR);
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Cy_SysEnableApplCore(CORE_CM7_1, CY_CORTEX_M7_1_APPL_ADDR);
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/* Place your initialization/startup code here (e.g. MyInst_Start()) */
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Cy_GPIO_Pin_Init(USER_LED_PORT, USER_LED_PIN, &user_led_port_pin_cfg);
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for(;;)
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{
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// Wait 0.05 [s]
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Cy_SysTick_DelayInUs(50000ul);
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Cy_GPIO_Inv(USER_LED_PORT, USER_LED_PIN);
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}
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}
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/* [] END OF FILE */
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