vee
164 lines
6.5 KiB
C
164 lines
6.5 KiB
C
/***************************************************************************//**
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* \file cy_mcwdt.c
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* \version 1.0
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*
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* Description:
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* Provides a system API for the MCWDT driver.
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*
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********************************************************************************
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* Copyright 2016-2017, Cypress Semiconductor Corporation. All rights reserved.
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* You may use this file only in accordance with the license, terms, conditions,
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* disclaimers, and limitations in the end user license agreement accompanying
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* the software package with which this file was provided.
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*******************************************************************************/
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#include "cy_mcwdt.h"
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*******************************************************************************
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* Function Name: Cy_MCWDT_Init
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****************************************************************************//**
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*
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* Initializes the MCWDT block.
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*
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* \param base
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* The base pointer to a structure that describes the registers.
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*
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* \param config
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* The pointer to a structure that contains component configuration data.
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*
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* \return cy_en_mcwdt_status_t
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* *base checking result. If the pointer is NULL, returns error.
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*
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* \note
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* This API should not be called when the counters are running. Prior to calling
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* this API the counter should be disabled.
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*
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*******************************************************************************/
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cy_en_mcwdt_status_t Cy_MCWDT_Init(volatile stc_MCWDT_t *base, cy_stc_mcwdt_config_t const *config)
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{
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cy_en_mcwdt_status_t ret = CY_MCWDT_BAD_PARAM;
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if ((base != NULL) && (config != NULL))
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{
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Cy_MCWDT_Unlock(base);
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un_MCWDT_CTR_CONFIG_t tempConfigParams = { 0ul };
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un_MCWDT_CTR2_CONFIG_t tempCNT2ConfigParams = { 0ul };
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base->unCPU_SELECT.u32Register = config->coreSelect;
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base->CTR[0].unLOWER_LIMIT.stcField.u16LOWER_LIMIT = config->c0LowerLimit;
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base->CTR[0].unUPPER_LIMIT.stcField.u16UPPER_LIMIT = config->c0UpperLimit;
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base->CTR[0].unWARN_LIMIT.stcField.u16WARN_LIMIT = config->c0WarnLimit;
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tempConfigParams.stcField.u2LOWER_ACTION = config->c0LowerAction;
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tempConfigParams.stcField.u2UPPER_ACTION = config->c0UpperAction;
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tempConfigParams.stcField.u1WARN_ACTION = config->c0WarnAction;
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tempConfigParams.stcField.u1AUTO_SERVICE = config->c0AutoService;
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tempConfigParams.stcField.u1SLEEPDEEP_PAUSE = config->c0SleepDeepPause;
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tempConfigParams.stcField.u1DEBUG_RUN = config->c0DebugRun;
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base->CTR[0].unCONFIG.u32Register = tempConfigParams.u32Register;
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base->CTR[1].unLOWER_LIMIT.stcField.u16LOWER_LIMIT = config->c1LowerLimit;
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base->CTR[1].unUPPER_LIMIT.stcField.u16UPPER_LIMIT = config->c1UpperLimit;
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base->CTR[1].unWARN_LIMIT.stcField.u16WARN_LIMIT = config->c1WarnLimit;
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tempConfigParams.stcField.u2LOWER_ACTION = config->c1LowerAction;
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tempConfigParams.stcField.u2UPPER_ACTION = config->c1UpperAction;
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tempConfigParams.stcField.u1WARN_ACTION = config->c1WarnAction;
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tempConfigParams.stcField.u1AUTO_SERVICE = config->c1AutoService;
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tempConfigParams.stcField.u1SLEEPDEEP_PAUSE = config->c1SleepDeepPause;
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tempConfigParams.stcField.u1DEBUG_RUN = config->c1DebugRun;
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base->CTR[1].unCONFIG.u32Register = tempConfigParams.u32Register;
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tempCNT2ConfigParams.stcField.u5BITS = config->c2ToggleBit;
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tempCNT2ConfigParams.stcField.u1ACTION = config->c2Action;
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tempCNT2ConfigParams.stcField.u1SLEEPDEEP_PAUSE = config->c2SleepDeepPause;
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tempCNT2ConfigParams.stcField.u1DEBUG_RUN = config->c2DebugRun;
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base->unCTR2_CONFIG.u32Register = tempCNT2ConfigParams.u32Register;
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Cy_MCWDT_Lock(base);
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ret = CY_MCWDT_SUCCESS;
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}
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return (ret);
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}
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/*******************************************************************************
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* Function Name: Cy_MCWDT_DeInit
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****************************************************************************//**
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*
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* De-initializes the MCWDT block, returns register values to their default state.
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*
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* \param base
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* The base pointer to a structure that describes the registers.
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*
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* \note
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* This API should not be called when the counters are running. Prior to calling
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* this API the counter should be disabled.
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*
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* \note
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* This API waits all counter are actually disabled after disables all counters,
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* And then start initializing other registers.
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*
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*******************************************************************************/
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void Cy_MCWDT_DeInit(volatile stc_MCWDT_t *base)
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{
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Cy_MCWDT_Unlock(base);
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// disable all counter
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for(uint32_t loop = 0ul; loop < CY_MCWDT_NUM_OF_SUBCOUNTER; loop++)
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{
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base->CTR[loop].unCTL.u32Register = 0ul;
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}
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base->unCTR2_CTL.u32Register = 0ul;
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for(uint32_t loop = 0ul; loop < CY_MCWDT_NUM_OF_SUBCOUNTER; loop++)
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{
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while(base->CTR[loop].unCTL.u32Register != 0x0ul); // wait until enabled bit become 1
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base->CTR[loop].unLOWER_LIMIT.u32Register = 0x0ul;
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base->CTR[loop].unUPPER_LIMIT.u32Register = 0x0ul;
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base->CTR[loop].unWARN_LIMIT.u32Register = 0x0ul;
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base->CTR[loop].unCONFIG.u32Register = 0x0ul;
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base->CTR[loop].unCNT.u32Register = 0x0ul;
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}
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while(base->unCTR2_CNT.u32Register != 0ul); // wait until enabled bit become 1
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base->unCPU_SELECT.u32Register = 0ul;
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base->unCTR2_CONFIG.u32Register = 0ul;
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base->unSERVICE.u32Register = 0x00000003ul;
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base->unINTR.u32Register = 0xFFFFFFFFul;
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base->unINTR_MASK.u32Register = 0ul;
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Cy_MCWDT_Lock(base);
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}
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/*******************************************************************************
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* Function Name: Cy_MCWDT_ClearWatchdog
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****************************************************************************//**
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*
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* Clears the MC watchdog counter, to prevent a XRES device reset or fault.
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*
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* \param base
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* The base pointer to a structure that describes the registers.
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*
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* \param counter
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* The number of the MCWDT counter. The valid range is [0-1].
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*
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*******************************************************************************/
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void Cy_MCWDT_ClearWatchdog(volatile stc_MCWDT_t *base, cy_en_mcwdtctr_t counter)
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{
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Cy_MCWDT_Unlock(base);
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Cy_MCWDT_ResetCounters(base, (1u << (uint8_t)counter), 0u);
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Cy_MCWDT_Lock(base);
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}
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#if defined(__cplusplus)
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}
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#endif
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/* [] END OF FILE */
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