feat: update CAN integration and T2G seat firmware

This commit is contained in:
vee
2026-08-01 15:55:21 +08:00
parent 8cda026ac2
commit 4aded5c21d
1443 changed files with 1007122 additions and 4978 deletions
@@ -85,16 +85,8 @@
#define SEAT_BACKREST_HEATER_SENSE_PORT GPIO_PRT12
#define SEAT_BACKREST_HEATER_SENSE_PIN (2u)
#define SEAT_BACKREST_HEATER_SENSE_GPIO_HSIOM P12_2_GPIO
#define SEAT_BACKREST_HEATER_SENSE_ADC PASS0_SAR1
#define SEAT_BACKREST_HEATER_SENSE_ADC_CHANNEL PASS0_SAR1_CH6
#define SEAT_BACKREST_HEATER_SENSE_PIN_ADDRESS CY_ADC_PIN_ADDRESS_AN6
#define SEAT_BACKREST_HEATER_SENSE_PORT_ADDRESS CY_ADC_PORT_ADDRESS_SARMUX0
#define SEAT_BACKREST_HEATER_SENSE_PCLK PCLK_PASS0_CLOCK_SAR1
#define SEAT_BACKREST_HEATER_SENSE_DIVIDER_NUMBER (4u)
#define SEAT_BACKREST_HEATER_SENSE_RESISTOR_OHM (1200u)
#define SEAT_BACKREST_HEATER_SENSE_KILIS (5000u)
#define SEAT_BACKREST_HEATER_ADC_REFERENCE_MV (3300u)
#define SEAT_BACKREST_HEATER_ADC_FULL_SCALE (4095u)
#define SEAT_BACKREST_HEATER_SENSE_RESISTOR_OHM (1200u)
#define SEAT_BACKREST_HEATER_SENSE_KILIS (5000u)
/* BTS7010 control facts confirmed on the power-driver schematic page. */
#define SEAT_BACKREST_HEATER_BTS7010_IN_ACTIVE_HIGH (1u)
@@ -0,0 +1,71 @@
#ifndef SEAT_CURRENT_ADC_CONFIG_H
#define SEAT_CURRENT_ADC_CONFIG_H
#include "cy_project.h"
#include "cy_device_headers.h"
/*
* PASS0 SAR1 is shared by all seat-current measurements. The schematic
* connects VREFH and the DRV8718 AREF rail to filtered 5 V, so raw-to-voltage
* calculations must use 5000 mV rather than the GPIO-domain 3.3 V supply.
*
* Logical motor mapping:
* M0 horizontal : ZYTTKZDY-AD, P10.6, ADC[1]_2
* M1 seat pan : JXBKZDY-AD, P12.1, ADC[1]_5
* M2 backrest : ZYKBKZDY-AD, P10.7, ADC[1]_3
* M3 legrest : ZYGDKZDY-AD, P10.5, ADC[1]_1
* heater current : KBJRD-AD, P12.2, ADC[1]_6
* fan current : FSDY-AD, P12.6, ADC[1]_10
*/
#define SEAT_CURRENT_ADC_INSTANCE PASS0_SAR1
#define SEAT_CURRENT_ADC_PCLK PCLK_PASS0_CLOCK_SAR1
#define SEAT_CURRENT_ADC_DIVIDER_NUMBER (4u)
#define SEAT_CURRENT_ADC_REFERENCE_MV (5000u)
#define SEAT_CURRENT_ADC_FULL_SCALE (4095u)
#define SEAT_CURRENT_ADC_OPERATION_FREQ_MAX_HZ (13340000u)
#define SEAT_CURRENT_ADC_SAMPLE_TIME_MIN_NS (600ull)
#define SEAT_CURRENT_ADC_POLL_TIMEOUT (100000u)
#define SEAT_CURRENT_M0_PORT GPIO_PRT10
#define SEAT_CURRENT_M0_PIN (6u)
#define SEAT_CURRENT_M0_GPIO_HSIOM P10_6_GPIO
#define SEAT_CURRENT_M0_CHANNEL PASS0_SAR1_CH2
#define SEAT_CURRENT_M0_PIN_ADDRESS CY_ADC_PIN_ADDRESS_AN2
#define SEAT_CURRENT_M1_PORT GPIO_PRT12
#define SEAT_CURRENT_M1_PIN (1u)
#define SEAT_CURRENT_M1_GPIO_HSIOM P12_1_GPIO
#define SEAT_CURRENT_M1_CHANNEL PASS0_SAR1_CH5
#define SEAT_CURRENT_M1_PIN_ADDRESS CY_ADC_PIN_ADDRESS_AN5
#define SEAT_CURRENT_M2_PORT GPIO_PRT10
#define SEAT_CURRENT_M2_PIN (7u)
#define SEAT_CURRENT_M2_GPIO_HSIOM P10_7_GPIO
#define SEAT_CURRENT_M2_CHANNEL PASS0_SAR1_CH3
#define SEAT_CURRENT_M2_PIN_ADDRESS CY_ADC_PIN_ADDRESS_AN3
#define SEAT_CURRENT_M3_PORT GPIO_PRT10
#define SEAT_CURRENT_M3_PIN (5u)
#define SEAT_CURRENT_M3_GPIO_HSIOM P10_5_GPIO
#define SEAT_CURRENT_M3_CHANNEL PASS0_SAR1_CH1
#define SEAT_CURRENT_M3_PIN_ADDRESS CY_ADC_PIN_ADDRESS_AN1
#define SEAT_CURRENT_HEATER_PORT GPIO_PRT12
#define SEAT_CURRENT_HEATER_PIN (2u)
#define SEAT_CURRENT_HEATER_GPIO_HSIOM P12_2_GPIO
#define SEAT_CURRENT_HEATER_CHANNEL PASS0_SAR1_CH6
#define SEAT_CURRENT_HEATER_PIN_ADDRESS CY_ADC_PIN_ADDRESS_AN6
#define SEAT_CURRENT_FAN_PORT GPIO_PRT12
#define SEAT_CURRENT_FAN_PIN (6u)
#define SEAT_CURRENT_FAN_GPIO_HSIOM P12_6_GPIO
#define SEAT_CURRENT_FAN_CHANNEL PASS0_SAR1_CH10
#define SEAT_CURRENT_FAN_PIN_ADDRESS CY_ADC_PIN_ADDRESS_AN10
#define SEAT_CURRENT_ADC_PORT_ADDRESS CY_ADC_PORT_ADDRESS_SARMUX0
#if !defined(CYT4BFBCJE) || !defined(CY_MCU_rev_d)
#error "Seat current ADC mapping requires CYT4BFBCJE rev_d headers."
#endif
#endif /* SEAT_CURRENT_ADC_CONFIG_H */
@@ -77,6 +77,9 @@
#define SEAT_FAN_CAN_FEEDBACK_PERIOD_MS (100u)
#define SEAT_FAN_CAN_ACCEPT_42A_COMMAND (1u)
/* FSDY-AD is P12.6 / ADC[1]_10 on the shared seat-current ADC. */
#define SEAT_FAN_CURRENT_SAMPLE_MS (10u)
/*
* BREG3 retains the debug-session state through debug/XRES/WDT resets.
* DEBUG_ACTIVE is written by firmware as soon as it observes C_DEBUGEN, so a
@@ -9,7 +9,38 @@
#define SEAT_MOVE_TASK_PERIOD_US (1000u)
#define SEAT_MOVE_START_STAGGER_MS (100u)
#define SEAT_MOVE_MAX_COMMAND_DURATION_MS (60000u)
#define SEAT_MOVE_MIN_COMMAND_DURATION_MS (100u)
#define SEAT_MOVE_MIN_CALIBRATION_TIMEOUT_S (10u)
#define SEAT_MOVE_MAX_CALIBRATION_TIMEOUT_S (600u)
#define SEAT_MOVE_COMMAND_QUEUE_DEPTH (8u)
#define SEAT_MOVE_MAX_CONCURRENT_MOTORS (4u)
/* Host mode plans issue the next axis within two seconds. Delay the clean
* SMV8 commit until the bus has been motion-idle for three seconds so a
* four-axis posture writes Work Flash once instead of racing every command. */
#define SEAT_MOVE_STORE_SAVE_DEBOUNCE_MS (3000u)
/* 2026-07-30 range tests verified that CAN MotorID and low-level DRV8718
* mode use the same channel number on the connected bench. */
#define SEAT_MOVE_LOGICAL_M0_PHYSICAL_MODE (0u) /* horizontal */
#define SEAT_MOVE_LOGICAL_M1_PHYSICAL_MODE (1u) /* seat-pan lift */
#define SEAT_MOVE_LOGICAL_M2_PHYSICAL_MODE (2u) /* backrest */
#define SEAT_MOVE_LOGICAL_M3_PHYSICAL_MODE (3u) /* legrest lift */
#define SEAT_MOVE_M0_DEFAULT_TIMEOUT_MS (12000u)
#define SEAT_MOVE_M1_DEFAULT_TIMEOUT_MS (8000u)
#define SEAT_MOVE_M2_DEFAULT_TIMEOUT_MS (12000u)
#define SEAT_MOVE_M3_DEFAULT_TIMEOUT_MS (10000u)
#define SEAT_MOVE_M0_DEFAULT_DUTY_PERCENT (90u)
#define SEAT_MOVE_M1_DEFAULT_DUTY_PERCENT (90u)
#define SEAT_MOVE_M2_DEFAULT_DUTY_PERCENT (90u)
#define SEAT_MOVE_M3_DEFAULT_DUTY_PERCENT (90u)
/* A Hall target is discrete and an endpoint can physically stop one or two
* pulses short because of switch/gear backlash. If a position move is
* already this close when an endpoint/stall event stops the bridge, classify
* the requested position as reached instead of retrying and latching STALL.
* The raw lastMotorEvent remains available in 0x303 for diagnosis. */
#define SEAT_MOVE_POSITION_TARGET_HALL_TOLERANCE (2u)
/* CAN4 wiring verified by Seat_Fan_demo and D:\wcl\can. P3.1 is shared with
* the DRV8718 DVDD enable on this board; both users require it to remain high. */
@@ -34,27 +65,44 @@
#define SEAT_MOVE_CAN_RX_QUEUE_DEPTH (16u)
#define SEAT_MOVE_CAN_DLC (8u)
#define SEAT_MOVE_CAN_PROTOCOL_VERSION (1u)
/* Repository image identity carried by 0x301 byte 7 high nibble. Increment
* whenever a host-visible safety or motion fix requires automatic reflash. */
#define SEAT_MOVE_FIRMWARE_REVISION (3u)
#define SEAT_MOVE_CAN_COMMAND_ID (0x300u)
#define SEAT_MOVE_CAN_SYSTEM_STATUS_ID (0x301u)
#define SEAT_MOVE_CAN_MOTOR_STATUS_ID (0x302u)
#define SEAT_MOVE_CAN_DIAGNOSTIC_ID (0x303u)
#define SEAT_CONTROLLER_IDENTITY_REQUEST_ID (0x304u)
#define SEAT_CONTROLLER_IDENTITY_RESPONSE_ID (0x305u)
#define SEAT_CONTROLLER_IDENTITY_MAGIC (0x54414553u) /* "SEAT" */
#define SEAT_CONTROLLER_IDENTITY_PROTOCOL (1u)
#define SEAT_CONTROLLER_FIRMWARE_VERSION_MAJOR (1u)
#define SEAT_CONTROLLER_FIRMWARE_VERSION_MINOR (1u)
#define SEAT_CONTROLLER_FIRMWARE_VERSION_PATCH (0u)
#define SEAT_CONTROLLER_CAPABILITY_MASK (0x3Fu)
#define SEAT_CONTROLLER_IDENTITY_RESPONSE_DATA1 \
((SEAT_CONTROLLER_CAPABILITY_MASK << 24u) | \
(SEAT_CONTROLLER_FIRMWARE_VERSION_PATCH << 16u) | \
(SEAT_CONTROLLER_FIRMWARE_VERSION_MINOR << 8u) | \
SEAT_CONTROLLER_FIRMWARE_VERSION_MAJOR)
#define SEAT_MOVE_CAN_CURRENT_DIAGNOSTIC_ID (0x304u)
#define SEAT_MOVE_SYSTEM_STATUS_PERIOD_MS (100u)
#define SEAT_MOVE_MOTOR_STATUS_PERIOD_MS (100u)
#define SEAT_MOVE_DIAGNOSTIC_PERIOD_MS (500u)
#define SEAT_MOVE_MOTOR_STATUS_POLL_MS (25u)
/* One motor is emitted per poll; 25 ms gives each axis a 100 ms 0x303/0x304
* update period and captures the 200 ms high-current confirmation window. */
#define SEAT_MOVE_DIAGNOSTIC_POLL_MS (25u)
/*
* Motor stall classification uses two independent observations:
* 1. no more than the Hall pulse threshold in the rolling Hall window;
* 2. current above this axis-specific delta-from-idle threshold.
*
* M0/M1 use external amplifiers, so every threshold remains independently
* configurable. After increasing all normal moves to 90% duty, 500 raw is
* intentionally retained as a conservative, uncalibrated default that
* prioritizes avoiding nuisance STALL reports. A low-Hall condition that
* stays below this current threshold is still stopped as TIMEOUT after 5 s.
* Replace these defaults only after loaded NORMAL and secured-stall tests at
* the final duty and supply voltage.
*/
#define SEAT_MOVE_MOTOR_CURRENT_SAMPLE_MS (10u)
#define SEAT_MOVE_MOTOR_CURRENT_MAX_AGE_MS (100u)
#define SEAT_MOVE_MOTOR_CURRENT_BASELINE_FILTER_SHIFT (3u)
#define SEAT_MOVE_MOTOR_STALL_CURRENT_CONFIRM_MS (200u)
#define SEAT_MOVE_MOTOR_NO_MOTION_TIMEOUT_MS (5000u)
#define SEAT_MOVE_M0_STALL_CURRENT_DELTA_RAW (500u)
#define SEAT_MOVE_M1_STALL_CURRENT_DELTA_RAW (500u)
#define SEAT_MOVE_M2_STALL_CURRENT_DELTA_RAW (500u)
#define SEAT_MOVE_M3_STALL_CURRENT_DELTA_RAW (500u)
#define SEAT_MOVE_MOTOR_CURRENT_MAX_ERRORS (3u)
/* BREG3 records a C-SPY session across debug/XRES/WDT resets. A genuine POR
* clears the latch, so normal vehicle operation never requires a debugger. */
@@ -63,13 +111,10 @@
#define SEAT_MOVE_DEBUG_EXIT_MAGIC (0x4D4F5645u) /* "MOVE" */
#define SEAT_MOVE_WDT_TIMEOUT_TICKS (3200u)
/* One dedicated 128-byte Work Flash small sector. */
/* Two dedicated 128-byte Work Flash small sectors. */
#define SEAT_MOVE_STORE_ADDRESS (CY_WFLASH_SM_SBM_TOP)
#define SEAT_MOVE_STORE_MAGIC (0x534D5633u) /* "SMV3" */
#define SEAT_MOVE_STORE_VERSION (3u)
#define SEAT_MOVE_STORE_LEGACY_MAGIC (0x534D5632u) /* "SMV2" */
#define SEAT_MOVE_STORE_LEGACY_VERSION (2u)
#define SEAT_MOVE_STORE_LEGACY_MOTOR_COUNT (3u)
#define SEAT_MOVE_STORE_MAGIC (0x534D5638u) /* "SMV8" */
#define SEAT_MOVE_STORE_VERSION (8u)
#if !defined(CYT4BFBCJE) || !defined(CY_MCU_rev_d)
#error "Seat_Controller_demo must be built for CYT4BFBCJE with rev_d headers."
@@ -79,17 +124,58 @@
#error "All four vehicle seat-motor outputs must be enabled."
#endif
#if (SEAT_MOVE_MAX_CONCURRENT_MOTORS == 0u) || \
(SEAT_MOVE_MAX_CONCURRENT_MOTORS > SEAT_MOVE_MOTOR_COUNT)
#error "Concurrent motor budget must be between one and four."
#endif
#if ((SEAT_MOVE_LOGICAL_M0_PHYSICAL_MODE == \
SEAT_MOVE_LOGICAL_M1_PHYSICAL_MODE) || \
(SEAT_MOVE_LOGICAL_M0_PHYSICAL_MODE == \
SEAT_MOVE_LOGICAL_M2_PHYSICAL_MODE) || \
(SEAT_MOVE_LOGICAL_M0_PHYSICAL_MODE == \
SEAT_MOVE_LOGICAL_M3_PHYSICAL_MODE) || \
(SEAT_MOVE_LOGICAL_M1_PHYSICAL_MODE == \
SEAT_MOVE_LOGICAL_M2_PHYSICAL_MODE) || \
(SEAT_MOVE_LOGICAL_M1_PHYSICAL_MODE == \
SEAT_MOVE_LOGICAL_M3_PHYSICAL_MODE) || \
(SEAT_MOVE_LOGICAL_M2_PHYSICAL_MODE == \
SEAT_MOVE_LOGICAL_M3_PHYSICAL_MODE))
#error "Each logical seat motor must map to a unique physical channel."
#endif
#if ((SEAT_MOVE_CAN_COMMAND_ID > 0x7FFu) || \
(SEAT_MOVE_CAN_SYSTEM_STATUS_ID > 0x7FFu) || \
(SEAT_MOVE_CAN_MOTOR_STATUS_ID > 0x7FFu) || \
(SEAT_MOVE_CAN_DIAGNOSTIC_ID > 0x7FFu) || \
(SEAT_CONTROLLER_IDENTITY_REQUEST_ID > 0x7FFu) || \
(SEAT_CONTROLLER_IDENTITY_RESPONSE_ID > 0x7FFu))
(SEAT_MOVE_CAN_CURRENT_DIAGNOSTIC_ID > 0x7FFu))
#error "Seat movement CAN identifiers must be 11-bit standard IDs."
#endif
#if (SEAT_MOVE_FIRMWARE_REVISION > 0x0Fu)
#error "The firmware revision must fit in the 0x301 high nibble."
#endif
#if (SEAT_MOVE_DEBUG_SESSION_BREG_INDEX >= SRSS_BACKUP_NUM_BREG)
#error "The selected debug-session backup register is not available."
#endif
#if ((SEAT_MOVE_MOTOR_CURRENT_SAMPLE_MS == 0u) || \
(SEAT_MOVE_MOTOR_CURRENT_MAX_AGE_MS < \
SEAT_MOVE_MOTOR_CURRENT_SAMPLE_MS) || \
(SEAT_MOVE_MOTOR_STALL_CURRENT_CONFIRM_MS == 0u) || \
(SEAT_MOVE_MOTOR_NO_MOTION_TIMEOUT_MS <= \
SEAT_MOVE_MOTOR_STALL_CURRENT_CONFIRM_MS) || \
(SEAT_MOVE_MOTOR_CURRENT_MAX_ERRORS == 0u))
#error "Motor current/stall timing configuration is invalid."
#endif
#if (SEAT_MOVE_POSITION_TARGET_HALL_TOLERANCE > 4u)
#error "Position target Hall tolerance must remain tightly bounded."
#endif
#if (SEAT_MOVE_STORE_SAVE_DEBOUNCE_MS < 1000u)
#error "The Work Flash save debounce must cover inter-axis host command gaps."
#endif
#endif /* SEAT_MOVE_CONFIG_H */